/*!
    \file    readme.txt
    \brief   description of the TIMER2 OC inactive dem

    \version 2025-08-08, V1.3.0, firmware for GD32E51x
*/

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  This example is based on the GD32E517Z-EVAL-V1.0 board, it shows how to configure the 
TIMER peripheral to generate three different signals with three different delays.
  
  The TIMxCLK frequency is set to systemcoreclock, the prescaler is 18000, so the 
TIMER1 counter clock is 10KHz.

  And generate 3 signals with 3 different delays:
  TIMER2_CH0 delay = 2000/2000 = 1s.
  TIMER2_CH1 delay = 4000/2000 = 2s.
  TIMER2_CH2 delay = 6000/2000 = 3s.

  So PA6 is reset after a delay equal to 1s, PA7 is reset after a delay equal to 2s,
and PB0 is reset after a delay equal to 3s.

  While the counter is lower than the TIMER_CHxCV registers values, which determines
the output delay. When the counter value reaches the TIMER_CHxCV registers values, 
the channel output compare interrupts are generated,and in the handler routine, 
these LEDs are turned on as follows:
            reaches the TIMER_CH0CV - LED3 on, LED4off
            reaches the TIMER_CH1CV - LED3 off, LED4 on
            reaches the TIMER_CH2CV - LED3 on, LED4 on
