/*!
    \file    readme.txt
    \brief   description of  SHRTIMER0 DMA mode example

    \version 2025-08-08, V1.3.0, firmware for GD32E51x
*/

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*/

  This example is based on the GD32E517Z-EVAL-V1.0 board. This example shows how to
use DMA with Slave_TIMER0 counter reset request to transfer data from memory to 
Slave_TIMER0 compare register 0~1.

  The ST0_CH0_O channel (PA8) and ST0_CH1_O channel (PA9) output a pair of complementar 
PWM waveforms with a period of 1us. The waveforms on pins of PA8 and PA9 can be observed
by oscilloscope.

  Slave_TIMER0 compare register 0~1 are to be updated once per circle. On the first reset 
DMA request, buffer[0] is transferred to SHRTIMER_ST0CMP0V and buffer[1] is transferred 
to SHRTIMER_ST0CMP1V. The  high level width of ST0_CH0_O channel (PA8) is 434ns.On the 
second reset DMA request,buffer[2] is transferred to SHRTIMER_ST0CMP0V and buffer[3] is
transferred to SHRTIMER_ST0CMP1V. The  high level width of ST0_CH0_O channel (PA8) is 217ns.
