/*!
    \file    readme.txt
    \brief   description of the TIMER0 output composite PWM and output match pulse demo for GD32G5x3

    \version 2025-07-15, V1.0.0, firmware for GD32G5x3
*/

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*/

  This demo is based on the GGD32G553Q-EVAL-V1.0 board, it shows how to configure TIMER0_CH0
 / CH1 in composite PWM mode and TIMER0_CH2 output match pulse.

  TIMER0 configuration:
  - CH0, CH1 and CH2 output composite PWM waveform.
  - CH2 enable the output match pulse function.

  TIMER0 frequency = CK_TIMER/216 = 1MHz. The PWM frequency is 1MHz / (99 + 1) = 10KHz.
  - CH0 configuration in composite PWM mode, the high level duty cycle 80% (100 % - (60 - 40) / 100 * 100%).
  - CH1 configuration in composite PWM mode, the high level duty cycle 20% ((60 - 40) / 100 * 100%).
  - CH2 will output 2 pulses when the matching event occurs.
