/*!
    \file    readme.txt
    \brief   description of the CMP Timer0_CH0IC demo

    \version 2025-07-15, V1.0.0, firmware for GD32G5x3
*/

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  This demo is based on the GD32G553Q-EVAL-V1.0 board, it shows how to configure the
comparator trigger TIMER0 channel 0 input capture event, which is configured
to generate an interrupt on the rising edge of the output signal.

  CMP0 is configured as following:
  - Inverting input is internally connected to VREFINT = 1.2V.
  - Non Inverting input is connected to PB1.
  - Output is internally connected to TIMER0_CH0.
  TIMER0 is configured as following:
  - TIMER clock frequency is set to systemcoreclock.
  - Prescaler is set to 215 make the counter clock is 1MHz.
  - Counter autoreload value is 65535.
  - TIMER0_CH0 captures the rising edge.

  After system start-up, enable comparator and TIMER, then check the TIMER0_CH0 input capture event.
  While CMP0 output signal is from low to high, LED2 will be toggled.
