/*!
    \file    readme.txt
    \brief   description of the TIMER0 complementary signals demo

    \version 2025-08-01, V1.0.0, firmware for gd32c2x1
*/

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*/

  This example is based on the GD32C231C-EVAL-V1.0 board,
it shows how to configure the TIMER0 peripheral to generate three complementary TIMER0 signals.
TIMER0CLK is fixed to systemcoreclock, the TIMER0 prescaler is equal to 48, so the TIMER0 counter
clock used is 1MHz, and the PWM frequency is 1KHz.

  The Three duty cycles are computed as the following description:
  The channel 0 duty cycle is set to 25% so channel 0N is set to 75%.
  The channel 1 duty cycle is set to 50% so channel 1N is set to 50%.
  The channel 2 duty cycle is set to 75% so channel 2N is set to 25%.

  Connect the TIMER0 pins to an oscilloscope to monitor the different waveforms:
    - TIMER0_CH0  pin (PA0)
    - TIMER0_CH0N pin (PA3)
    - TIMER0_CH1  pin (PA1)
    - TIMER0_CH1N pin (PA4)
    - TIMER0_CH2  pin (PA2)
    - TIMER0_CH2N pin (PA5)
