/*!
    \file    readme.txt
    \brief   description of the CMP pwm_signal_control example

    \version 2023-08-01, V1.0.0, HAL firmware for GD32F3x0
*/

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*/

  This demo is based on the GD32350R-EVAL-V1.0 board, it shows how to control PWM 
output by using comparator output.

  CMP0 is configured as following:
  - Inverting input is internally connected to VREFINT = 1.2V.
  - Non Inverting input is connected to PA1.
  - Output is internally connected to TIMER0 OCREFCLR(output compare reference clear).
  TIMER0 is configured as following:
  - TIMER clock frequency is set to systemcoreclock, 
  - Prescaler is set to XX make the counter clock is 1MHz.
  - Counter autoreload value is 9999 and CH0 output compare value is 4999, TIMER_CH0 outputs PWM with 50% dutycycle.
  - TIMER_CH0 outputs PWM with 50% dutycycle.

  After system start-up, enable comparator and TIMER, then watch the waveform on PA8.
  While PA1 is lower than VREFINT(1.2V), PWM signal is displayed on PA8.
  While PA1 is higher than VREFINT, PWM signal is cleared and PA8 output low.
  