/*!
    \file    readme.txt
    \brief   description of POC input detection mask

    \version 2026-03-04, V1.0.0, firmware for GD32M53x
*/

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  This example is based on the GD32M531R-EVAL-V1.2 board, it provides a
description of POC input disable timer0 output.

  The TIMER1 frequency is set to180MHz, the prescaler is 900, so TIMER1 counter
frequency is 200KHz.

  The four duty cycles are computed as the following description:
  - channel 0 duty cycle is set to 25 %.
  - channel 1 duty cycle is set to 75 %.
  The CH0 and CH1 are configured in PWM mode 1.

  POC is configured as following:
  - POC_IN1 is selected for disabling timer1 output.
  - High level is detected.
  - High impedance output is selected.
  - TIMER1_CH0 output is mask source.

  when POC_IN1 (PE14) input high level, a disabling request is generated.
Then, the PWM output of TIMER1_CH1 is disabled.

  After system start-up, connect PE14 and 3.3V with Dupont line.
The variations of the wave can be observed through the oscilloscope.
