/*!
    \file    readme.txt
    \brief   description of the ADC0_ADC1_regular_parallel example

    \version 2025-08-07, V1.6.0, demo for GD32VF103
*/

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*/

  This demo is based on the GD32VF103V-EVAL-V1.0 board, it shows how to use ADC0 and ADC1
regular_parallel convert function. PA3 and PA0 are configured in AIN mode. TIMER1_CH1
is the trigger source of ADC0. ADC1 external trigger chooses none. When the rising edge
of TIMER1_CH1 coming, ADC0 and ADC1 regular channels are triggered at the same time. The
values of ADC0 and ADC1 are transmit to array adc_value[] by DMA.

  We can watch array adc_value[] in debug mode or by COM.
  JP5 and JP6 jump to USART.
